1. Field of the Invention
The present invention relates to methods for forming semiconductor substrates, and more particularly to methods of die sawing and structures formed thereby.
2. Description of the Related Art
With advances associated with electronic products, semiconductor technology has been widely applied in manufacturing memories, central processing units (CPUs), liquid crystal displays (LCDs), light emission diodes (LEDs), laser diodes and other devices or chip sets. In order to achieve high-integration and high-speed goals, dimensions of semiconductor integrated circuits continue to shrink. Various materials and techniques have been proposed to achieve these integration and speed goals and to overcome manufacturing obstacles associated therewith.
In order to achieve these targets, a multi-layer interconnect structure is used. Generally, various test patterns, including a layer of metal or other metal structure, are formed within scribe line areas defined on a wafer for measurements of physical or electrical characteristics associated with the multi-layer interconnect structure. The test patterns are subjected to a wafer acceptance test (WAT). Through collection of information indicative of the physical or electrical characteristics, it is determined whether performances of devices or circuits formed within die areas surrounded by the scribe line areas are acceptable. After WAT measurements, the wafer is subjected to a sawing process along the scribe line areas for singulating the dies formed on the wafer.
FIG. 1 is a cross-sectional view showing a prior art structure during sawing. A substrate 100 includes a plurality of die areas and scribe line areas. Integrated circuits or devices are formed within the die areas. The scribe line areas separate the die areas for isolation of integrated circuits formed within different die areas. The scribe line areas are the areas along which the substrate 100 is sawed.
In each of the die areas, an interconnection structure 110 is formed therein. The interconnection structure 110 comprises a multi-layer structure, such as metal layers 101, 103 and 105. The metal layers 101, 103 and 105 are separated by dielectric layers 102 and 104. The metal layers 101, 103 and 105 are connected to each other by way of vias/contacts 107 and 108 formed within the dielectric layers 102 and 104, respectively. A passivation layer 106 with openings 120 is formed over the interconnection structures 110 and the dielectric layer 104. The passivation layer 106 is a dielectric layer or polyimide layer. The openings 120 are formed by a photolithographic process and an etch process so that a subsequent conductive layer can be formed therein for purpose of electrical connection.
A blade 130 saws the substrate 100 along the scribe line areas to obtain a plurality of individual dies. The sawing process may crack the multi-layer structure, e.g., the passivation layer 106, dielectric layers 102 and/or 104, within the scribe line areas. The cracking of the multi-layer structure can result in mechanical failure or contamination of the dies. This situation worsens if the dielectric layers 102 and 104 are extreme low-k (ELK) dielectric layers, which are extremely fragile.
As described above, the scribe line areas also include WAT patterns (not shown) that include at least one layer of metal or metal structure (not shown). During a sawing process, the metal layer of the WAT patterns is also subjected to the mechanical stress and force applied by the blade 130. Unlike low-k dielectric materials, metal material layers, such as copper, tend to be soft and extensible, allowing pieces of metal to attach to the blade 130 during the sawing process. These metal fragments not only can worsen cracking of the passivation layer 106, dielectric layers 102 and/or 104, but also can dull the blade 130.
By way of background, U.S. Pat. No. 6,951,801 provides a process for removing metal from a scribe area of a semiconductor wafer, the entirety of which is hereby incorporated by reference herein.
From the foregoing, improved singulation methods, such as improved sawing methods, and structures formed thereby are desired.